Featured below are links to some recent articles about MIPS Technologies. Read on to see what reporters, editors and industry analysts are saying about MIPS.

Eclipse toolset eases the building of MIPS-based embedded systems that run Linux

Embedded Systems Design Editorial Director Richard Nass offers a good overview of MIPS’ new Navigator ICS Integrated Component Suite. He notes, “Without good tools, it really doesn’t make a difference how good your processor is, which is something I’ve been preaching for years, and is strongly backed up year after year by our Embedded Market Study.” Read the article here.

MIPS rolls out its own IDE

Jim Turley, embedded expert and contributing editor for Embedded Technology Journal, takes a look at MIPS’ new Navigator ICS, including discussions of why good development tools are a must, and the benefits of being able to debug the Linux kernel. According to Turley, “Because the whole NavICS suite is both MIPS- and Linux-aware, it accurately identifies kernel calls, drivers, and other deeply buried subroutines so programmers don’t have to try correlating address maps with source listings.” Read more here.

Breaking the gigahertz speed barrier

EE Times India recently posted a paper from the Synopsys User Group (SNUG) Conference 2007 that was co-written by Synopsys and MIPS Technologies. If you weren’t at the conference, the paper is worth checking out. It discusses development of a methodology for the MIPS32® 74K™ synthesizable core that enables it to achieve processing speeds of 1 GHz or greater, using off-the-shelf 65nm process, standard cells and memories. The companies identified a number of trade-offs in the design methodology and refined it to produce reliable, high-quality results. Click here to download the paper in PDF.

Achieving cache coherence in a MIPS32 multicore design

MIPS Design Engineer Matthias Knoth discusses how the Open Core Protocol supports cache-coherent traffic within an embedded multicore cluster. The article goes in-depth on cache coherency in the multi-threaded, multi-core MIPS32® 1004K™ core family. Read the article here.

IP cores put USB functions into advanced SoCs

EE Product Center Contributing Editor Ismini Scouras highlights MIPS Technologies’ new 40nm USB PHY IP core and USB-certified 1.8v 45nm USB PHY IP core that enable developers to easily integrate USB functionality into their advanced SoCs for consumer applications. According to Scouras, “MIPS Technologies’ USB PHY IP cores represent a new generation of USB physical layer architectures using 1.8v or alternatively 2.5v IO devices to deliver low power consumption for 45nm and 40nm SoC designs.” Read the article here.

Tuner IP cuts costs, minimizes risks for GPS developers

Ismini Scouras discusses MIPS’ silicon-proven GPS RF tuner IP, which enables embedded system designers to decrease costs and time-to-market for next-generation GPS devices. With standard digital output, the GPS Tuner IP supports Global Navigation Satellite System (GNSS) systems in the L1 band and is also compatible with Galileo, for a broad range of markets and applications. Read more here.

MIPS inks new licensing agreements with PMC-Sierra

Suzanne Deffree, Managing Editor of Electronic News, writes that PMC-Sierra licensed new MIPS cores for its next-generation communications and storage solutions. Cores include MIPS’ highest performance single-threaded cores, multi-threaded cores, and the new multi-threaded, multiprocessor IP core, the MIPS32®1004K™ Coherent Processing System. Read the article here.

Audio signal processing can cut power

Joao Risques, MIPS Technologies’ Audio Product Line Manager, discusses techniques that can be employed to decrease noise in analog audio signal processing—an increasing challenge as more digital content at higher clock rates is added to SoCs. Read the article here.

Viewpoint: Analog IP integration needs support

MIPS Technologies’ CEO John Bourgoin discusses trends and challenges in today’s complex SoC development process, including rising software content, increasing integration of analog functionality and the importance of the design ecosystem. Read the article here.