Microcontrollers

The transition from 8/16-bit to 32-bit MCUs is well underway.

• While 8-bit and 16-bit MCUs proliferate in more basic, single-function systems a more sophisticated range of end-use application products requiring more performance with more advanced features are driving the move towards 32-bit MCU designs.
• The availability of standard, software compatible, 32-bit architecture, such as that provided by MIPS, is enabling developers to re-use IP across multiple system designs, thereby reducing costs and opening up opportunities for the use of similar SoCs in a wide range of markets and applications.
• With increased complexity and more functionality comes increased memory footprint. Over 40% of a MCU SoC area is taken up by memory, both flash and SRAM technologies. As a result, to offset the additional cost and reduced memory throughput MCU designers are turning to providers of processor cores, such as MIPS Technologies, that offer both code compression and advanced, low latency memory acceleration.
• MCUs interface to the 'real analog' world, being required to support and service an increasing number of these peripheral I/O signals in a shorter period of time. This is especially so with the increase in higher speed communication mobile/wireless subsystems and the increased precision required in motor/sensor based systems. 32-bit systems are required to provide the high real-time performance and reduced interrupt latency that these systems require.

The migration of systems using 32-bit has opened additional applications for MCUs as a co-processor to the main system processor, which until recently was tasked to control the majority of the system resulting in more complex and more expensive solutions. These applications include: mobile baseband processing, multimedia, wireless connectivity, high performance engine control, security and power management.

MCUs are now integrating DSP functionality to address the signal processing requirements of an embedded market using more graphics, audio and filter technologies in the end-product. MCUs are effectively removing the need for an additional, dedicated, entry level DSP-enabled SoC.

The ongoing enhancements and complexity of MCUs require improvements in the features and functionality of development tools to keep pace. It is not uncommon for embedded systems to incorporate MCUs of 200k+ gates, operating at over 100MHz, with 2/3 on-chip memory interfaces, Memory Management Unit, Bus Interface Unit, DMA controller, many peripheral I/O subsystems, running under the control of an RTOS and  executing several application programs. To debug and develop such a system requires a complete, integrated set of development tools that interact seamlessly with each other and provide total design coverage of the SoC before release and integration into the target system.

The number and type of tools required is increasing to include not only the typical RTL development tools of debug probes, software compilers and FPGA platform but also tools that provide a level of design verification before RTL, including: virtual platforms and instruction and cycle accurate simulator models.

Increasingly, embedded systems are employing more 'eco-friendly' technologies and features. In addition more systems are battery operated, requiring more time executing from battery and less time charging. Mobile phone, hand-held meters, solar power systems, smart sensors, automotive electronics and home entertainment appliances are typical system examples.

Power management becomes a major design consideration when developing solutions for such applications.

MIPS innovations for MCU and other low cost embedded applications are available in three MIPS32® processor core solutions: the MIPS32 M4K™, M14K™ and M14Kc™ cores.

Each of these cores addresses the key requirements for successful embedded market solutions, namely:

• Performance efficiency: The synthesizable M4K and M14K/c processor cores are designed on a standard, well proven 4K™ micro-architecture with a 5-stage pipeline execution unit. The M14K/c cores are capable of providing performance efficiency of 1.57 DMIPS/MHz and 2.72 CoreMarks/MHz. In a 90nm G process the M4K core can execute at 340MHz, while the M14K/c cores can operate up to 400MHz in a 65LP process.
• Code size reduction: Advanced code compression technology reduces instruction memory size, translating to reduced silicon and system memory cost. The M14K core incorporates the microMIPS™, which combines 16- and 32-bit instructions in a single, unified Instruction Set Architecture (ISA) that is optimized for code size and performance. The M4K core optionally includes MIPS16e™, an Application Specific Extension (ASE) that adds 16-bit instructions to MIPS32 for code density and compact memory size.
• Real-time operation: MIPS solutions reduce interrupt latency, decrease context switching time and include deterministic SRAM-type memory interfaces.
• Improved flash-based code execution: The M14K core incorporates a pre-fetch buffer that accelerates code access from slow flash memory, reducing the Cycles per Instruction (CPI), and hence improving software execution performance.
• Low power consumption: Compact, low power processor cores include power management techniques on a fully static design.
• Debug: Extensive EJTAG-compatible debug and profiling capabilities include support for complex breakpoints, iFlowtrace™ enhanced trace, performance and program analysis features. In addition, the M14K/c cores include support for a low-cost 2-wire cJTAG interface.
• Flexibility: A high degree of configurability, support for user-defined co-processors and several build-time options allow for design flexibility to develop an SoC that fits the exact requirements of the target application.
• Development support: MIPS Technologies provides an extensive, integrated hardware and software development environment for both MIPS32 and microMIPS based product designs, including the Eclipse-based Sourcery CodeBench GNU software toolchain, MIPS Navigator™ Integrated Component Suite (ICS), System Navigator debug probe and the SEAD3 FPGA-based hardware/software co-development platform . Additional support for RTOS, EDA/ESL, middleware and debug tools are available from the many third parties in the MIPS Ecosystem.

Mentor Graphics - Sourcery CodeBench for ELF, Sourcery CodeBench for Linux
Mentor Graphics - Nucleus Plus 2.1
Express Logic - ThreadX
eCosCentric - eCosPro and Redboot
Micrium - uc/OS-II
Segger - emBOS
FreeRTOS - FreeRTOS
Lauterbach - Trace32 probe
Macraigor - Wiggler and Demon
Montavista - Linux6
Timesys - Embedded Linux
Imperas - OVPSim
Carbon - CA Models
Ashling - Opella-XD debug probe
CMX - CMX RTOS

Articles

• MicroProcessor Report - A MIPS32 Core for Your MCU
• MicroProcessor Report - microMIPS Crams Code
• Circuit Cellar - MIPS For The Masses
• EETimes - Holistic tack to 32-bit design

White Papers

• Beyond the Hype: MIPS32 - the Processor for MCUs
• Addressing Design Challenges in 32-bit Microcontrollers

Application Notes

• Interfacing High Performance 32-bit Cores to Microcontroller Based Memory Architectures
• Brief Introduction to MIPS32® M4K® Core Shadow Registers for Microcontroller Applications
• Using the MIPS32® M4K® Processor Core SRAM Interface in Microcontroller Applications

Blogs

• Nice Try, No Cigar
• MIPS China Design Community Gets Creative
• Beyond The Hype - part Deux

Microchip

• PIC32 MCU
• Starter kit
• Development kits
• PIC32 design community
• Academic Program
• YouTube channel
• Article - Application Portability for 32-bit Microcontrollers, Reality or Myth
• Book - Exploring the PIC32

Broadcom
Amimon

• Chipsets
• Reference Designs
• Customer Products

MStar

• Chipset
• Customer Product

Dialog