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MIPS16e®

The MIPS16e® ASE (Application Specific Extension) is an optional extension to both the MIPS32® and MIPS64®architectures.

The MIPS16e ASE enables embedded system designers to reduce costs by decreasing the size of memory required to run their application by up to 40 percent compared to traditional 32-bit software implementations. In addition to providing advanced code density, the MIPS16e ASE also achieves a high level of power efficiency, and performance equivalent to that of 32-bit only implementations. The MIPS16e ASE also improves instruction cache hit rate. It is supported by hardware and software development tools from MIPS Technologies and other providers.

  • A compressed instruction set that allows for reduced system costs through smaller code memory size requirements
  • Applications compiled with MIPS16e are 30% smaller on average when compared to MIPS32®
  • Compatibility with MIPS32 and MIPS64® instruction sets
  • Ability to switch between MIPS16e mode and MIPS 32-bit mode
  • MIPS16e instructions are 16-bits in size
  • 8 of the 32 general purpose registers are accessible in MIPS16e mode; these include the registers commonly used for argument passing and return values
  • 8-bit, 16-bit and 32-bit data-types are supported when used with MIPS32; when used with MIPS64, 64-bit data-types are added
  • Mode switching between MIPS16e and MIPS32/64 allows for privileged architecture/floating-point/ASE support; software control of this mode switching is accomplished through a special jump instruction
  • The EXTEND instruction allows the 16-bit instructions to efficiently create 16-bit immediate values
  • SAVE/RESTORE instructions increase the code density for stack frame handling
  • PC-relative addressing increases the code density for creating load/store addresses
  • Some instructions use implied register specifiers to increase code density - the stack pointer or program counter for load/stores; a GPR designated for compare results for branches
  • Support exists for application-specific macro instruction sequences

See MIPS Run, Second Edition
Author: Sweetman, Dominic
Publisher: Morgan Kaufmann; 2 edition (October 31, 2006)
ISBN-10: 0120884216
ISBN-13: 978-0120884216

MIPS Assembly Language Programming
Author: Britton, Robert
Publisher: Prentice Hall; illustrated edition edition (June 7, 2003)
ISBN-10: 0131420445
ISBN-13: 978-0131420441

The Mips Programmer's Handbook
Author: Bunce, Philip; Farquhar, Erin
Publisher: Morgan Kaufmann; 1st edition (January 15, 1994)
ISBN-10: 1558602976
ISBN-13: 978-1558602977

Real-Time Embedded Multithreading Using ThreadX and MIPS
Author: Lamie, Edward
Publisher: Newnes; Pap/Cdr edition (December 26, 2008)
ISBN-10: 1856176312
ISBN-13: 978-1856176316

Computer Architecture, Fourth Edition: A Quantitative Approach
Authors: Hennessy, John; Patterson, David
Publisher: Morgan Kaufmann; 4 edition (September 27, 2006)
ISBN-10: 0123704901
ISBN-13: 978-0123704900