MIPS Products

64-bit Cores

MIPS Technologies offer the highest performance synthesizable and custom hard cores by its implementation of the MIPS64® architecture.

The MIPS64® 5K® family of synthesizable processor cores enables SoC designers to get to the highest frequency and performance for their application while having the flexibility of choosing any foundry processes and choosing the right configuration to suit the needs of their application. The 5Kc core delivers performance of 1.4 DMIPS/MHz and a worst case operating frequency of 350MHz in a .13um process node. The 5Kf core integrates a floating point unit to a 64-bit processor to enable cutting-edge digital consumer applications.

The MIPS64 20Kc™ core is the fastest licensable embedded microprocessor IP available today in the industry. It has a typical operating frequency of 600MHz and a worst case operating frequency of 533MHz at the .13um process technology node. It is available from MIPS as a full custom hardened processor core from multiple foundries. The semiconductor companies can quickly get to market with an advanced high performance system-on-chip (SoC) design with a dropped-in 20Kc at a foundry of their choice. The 20Kc core is a full dual issue superscalar machine implementing a 7 stage pipeline. It includes a IEEE754 compliant SIMD Floating-Point-Unit (FPU) with MIPS-3D graphics extensions to accelerate geometry calculations. It can execute 2 integer instructions or 1 integer and 1 floating point instructions per cycle. The core delivers 1020 DMIPS version 2.1 (no inlining) of integer performance and delivers a 2.4 GFLOPS peak floating point performance at 600MHz operating frequency.

MIPS64® Family Features

5Kc®5Kf®20Kc™
Pipeline DesignMIPS64
6-Stage
MIPS64
6-Stage
MIPS64
7-Stage
Issue RatetdLimited Dual IssueLimited Dual IssueFull Dual Issue
Synthesizable or HardSynthesizableSynthesizableCustom Hard Core
Fast Multiplieryesyesyes
Full MMUyesyesyes
Cache Controller yesyesyes
Max Cache Size64KB64KB32KB (fixed)
Date Cache TypeWrite BackWrite BackWrite Back
Floating Point Unitnoyesyes
MIPS3D ASEnonoyes


MIPS64® Family Specs

Process0.13um LV
ProcessProcessProcessProcess
Issue Rate5Kc®5Kf®20Kc™
FrequencyWorst case 350 MHzWorst case 320 MHzWorst case 533 MHz
Area
(when synthesized for area)
1.8-2.6 mm(2) (no caches)3.0-4.4 mm(2) (no caches)20 mm(2) - Hard Core (Includes 32K/32K L1 caches, FPU and TLB)
DMIPS/MHz v2.1(no inlining)1.41.41.7
Max DMIPS v2.1 (with no inlining)490490906