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MIPS® DSP Technology

DVDs, digital cameras, residential gateways and VoIP phones are examples of the growing list of consumer products that require an increasing amount of signal and media processing horsepower. In the cost-sensitive, high-volume consumer electronics market, eliminating unnecessary hardware and tool chains and reducing royalty payments can result in large savings..

To address these trends, MIPS Technologies makes available DSP functionality as part of the standard MIPS architecture to provide a single design environment that leverages a common tool set and knowledge base. The MIPS DSP technology offers licensees a programmable solution for DSP applications, allowing adaptation to changing market needs and extending the life of an SoC design. The DSP module comprises a set of instructions and state in the integer pipeline of MIPS Technologies cores and requires minimal additional logic to implement in MIPS processor cores.

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  • Single-Instruction-Multiple-Data (SIMD) execution model
  • Geared towards image processing, video processing, voice codecs, audio codecs, soft-modem, VOIP, general DSP processing such as filters, convolution, etc.
  • Rich support for byte/2-byte/4-byte and fractional integer vector data-types
  • 30 to 300% performance improvement for many applications
  • 5-10% additional core area
  • Supported by software development tools
  • 4 x 64-bit Accumulators for MIPS32®; 4 x 128-bit Accumulators for MIPS64®
  • MIPS32 support for 4x8-bit; 2x16-bit, 32-bit integer data types as well as 16-bit and 32-bit Fractional Fixed Point data types; MIPS64 adds 8x8-bit, 4x16-bit, 2x32bit and 64-bit integer data types
  • Vector-element-wise add, subtract, multiply, dot-product (multiply-accumulate), compare instructions
  • Complex math multiply support
  • Flexible bit-field extract, deposit instructions
  • Vector-element bit reversal and replicate instructions
  • Vector-element pick, pack and reduction instructions
  • Optional rounding of multiply results as well as rounding of final accumulate operations
  • Optional scaling of input operands
  • Circular buffer support through Modulo addressing
  • Base Register+Index Register memory addressing mode
  • Saturating fractional math
  • MAC/dot-product
  • Variable bit insert
  • Variable bit extract