MIPS Toolchain Configurations
The most recent version of the MIPS architecture is Release 6 (R6) and applies to both MIPS32 and MIPS64 families. Release 6 takes an already pure RISC ISA and further streamlines it for maximum performance and power efficiency. To support this, the Codescape MIPS SDK includes two configurations of the GCC toolchains; each targeting a subset of MIPS architectures.
MIPS32R2 and MIPS64R2 through to MIPS32R5 and MIPS64R5 as well as the MicroMIPS ASE for each of those architectures.
New for MIPS32R6 and MIPS64R6 as well as the MicroMIPS ASE for each of these architectures.
The default code generation for each configuration is as follows:
MIPS32R2, O32, Big Endian, Hard-Float objects
MIPS32R6, O32, Big Endian, Hard-Float objects
The architecture support is split in this manner to reflect the generational changes to the MIPS architecture between Release 5 and Release 6. See more on the Imagination MIPS Blog