MIPSfpga Fundamentals – Version 1.3

The MIPSfpga Fundamentals Material was updated on 7th April 2016.

 

The changes in Version 1.3 are as follows:

  • Updated all documents (Overview and Xilinx/Altera Instructions) to v.1.3

 

Lab 2:

  • Figure 3 updated for Altera.
  • Fixed this line (“Lab02_C” was missing):

loadMIPSfpga.bat ..\..\Altera\Lab02_C\ReadSwitches

 

Lab 9 changes:

  • CLOCK_50 is the onboard 50 MHz clock.
  • The size of the reset (boot) RAM address is 11 bits. So the boot RAM has 211 32-bit words = 213 bytes = 8 KB.
  • Deleted this sentence from page 7: “You should now see the green LEDs display incremented values.”
  • Text references to Figures 14 to 23 corrected.