How to generate the core files.

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This topic contains 3 replies, has 2 voices, and was last updated by  Robert Owen 9 months ago.

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  • #64415

    Harry
    Participant

    We have install the tar ball file. Right now, I did follow the doc to create a project directory. What is the next step to create the MIPS core rtl files? I saw that there is a lot of rtl files under the $MIP_HOME>$MIP_CORE directory. Is it where I can find the rtl files? or I should be able to find the selected rtl files in my project directory after configuration. I am being confused by the document. Since they never mention about the way to generate the core, they only discussed to extract the tar ball and then simulation.

    #64418

    Robert Owen
    Participant

    Harry
    I have taken advice. Your question is not one that we expect from an academic using MIPSfpga. The configuration of microAptiv that is part of MIPSfpga is fixed and you do not have to generate a configuration.
    All the information required is given in the Teaching Resource “Getting Started Guide v2.0”.

    The configuration tool referred to in the microAptiv reference guide is for commercial customers who licence a MIPS core, and then adjust it to their needs. If you are a MIPS licensee, this is a question for the Partner Portal. It doesn’t belong on this Forum.

    I remind you that the licence for MIPSfpga is for academic use only.

    #64417

    Harry
    Participant

    MIPS32® microAptiv™ UC Processor
    Core Family System Package &
    Simulation Flow User’s Manual
    Document Number: MD00935
    Revision 01.03
    July 30, 2014

    Is it the most updated one?
    I am trying to generate the M14K.

    #64416

    Harry
    Participant

    My question is …..
    Chapter 2 is talking about the installation.
    and then chapter 2 is going to explain the way of create a project directory. In this chapter, they will ask you to configure the MIPS for custom project.

    I don’t get the m14k_top.v or m14k_cpu.v in my custom project directory. It only have 15 files in the rtl folder. After chapter 3 , it jumps to verification and simulation later.

    Thanks,
    Harry

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