MIPSfpga+ Altera MAX10 fpga device ADC core support Home › Forums › MIPS Insider › MIPSfpga › MIPSfpga+ Altera MAX10 fpga device ADC core supportThis topic contains 1 reply, has 2 voices, and was last updated by Robert Owen 11 months, 2 weeks ago.Viewing 2 posts - 1 through 2 (of 2 total)Author Posts12th June 2017 at 10:21 pm #64429 StanislavParticipantHello! I have added the Altera MAX10 fpga device ADC core support to MIPSfpga+ project. Main featuresSmall. The module core have about 250 lines of Verilog code);Simple. Module register interface (architecture) is very similar to Atmel ATmega88 devices ADC block;Supports up to 10 input pins (1 dedicated, 8 dual purpose analog input pins, 1 device temperature sensor);Supports ADC conversion speed up to 1 MSPS (in Free Running mode) and up to 0.33 MSPS when conversion starts by external trigger input;ADC Conversion End interrupt signal support;Checked on Terasic DE10-Lite board (Altera MAX10 10M50DAF484C7G FPGA device);Project for standalone ADC core debug: github.com/zhelnio/ahb_lite_adc_max10Module documentation is attached and also pablished on github12th June 2017 at 11:30 pm #64430 Robert OwenParticipantDear Stanislav This is an excellent piece of work – many thanks for sharing! R.Author PostsViewing 2 posts - 1 through 2 (of 2 total)Forums are currently locked.