MIPSfpga+ Altera MAX10 fpga device ADC core support

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This topic contains 1 reply, has 2 voices, and was last updated by  Robert Owen 11 months, 2 weeks ago.

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  • #64429

    Stanislav
    Participant

    Hello! I have added the Altera MAX10 fpga device ADC core support to MIPSfpga+ project.
    Main features

    • Small. The module core have about 250 lines of Verilog code);
    • Simple. Module register interface (architecture) is very similar to Atmel ATmega88 devices ADC block;
    • Supports up to 10 input pins (1 dedicated, 8 dual purpose analog input pins, 1 device temperature sensor);
    • Supports ADC conversion speed up to 1 MSPS (in Free Running mode) and up to 0.33 MSPS when conversion starts by external trigger input;
    • ADC Conversion End interrupt signal support;
    • Checked on Terasic DE10-Lite board (Altera MAX10 10M50DAF484C7G FPGA device);
    • Project for standalone ADC core debug: github.com/zhelnio/ahb_lite_adc_max10

    Module documentation is attached and also pablished on github

    #64430

    Robert Owen
    Participant

    Dear Stanislav
    This is an excellent piece of work – many thanks for sharing!
    R.

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