I’m trying to use the project_linux as a starting point for deciding which way to go with a school project where I’ll be extending or enhancing it in some way. So far I cannot get the project through implementation.
I imported the board definitions (old/board_parts) found in master.zip and unpacked them into the board_parts of my Vivado installation. I then tried generating the bitstream for the project_linux project. It ultimately failed at implementation with 11 nets between what appear to be asynchronous resets. I do not see in the provided documentation where this is described as an expected outcome or where one has to set false constraints (or otherwise ignore) these critical warnings.
Has anyone else tried building the Linux project provided in the MIPSfpga SoC v1.0 project?