Forum Replies Created
- 17th August 2017 at 6:33 pm in reply to: Academic paper: Practical Experiences based on MIPSfpga (Chaver. et al, 2017) #64428
Всегда пожалуйста, Jay Ng! You’re welcome!26th July 2017 at 5:43 pm in reply to: Runing Linux on MIPSfpga+ and Altera's FPGA-based board #64424
Thanks for your kind words! Yes, UART and SDRAM modules of MIPSfpga-plus are platform independent. They are written on pure Verilog. So there should be no problem with porting this configuration to Xilinx boards. The only thing you have to check (and may be configure) are SDRAM timings and clock shift. The current version of SDRAM module supports only x16 memory, but this can be easily fixed.
Sorry, but I cant help you with information about Xilinx FPGA based board with SDRAM chip on it. Because I have only Altera FPGA based boards.
Thanks for your kind words! I have added some information about how to choose the debug module (with link to Aliexpress store)
Hello! I have successfully checked the EJTAG debug with this FTDI-chip based module from Aliexpress (price $15) without any software configuration changes.
There are some details that you should to take into consideration when working with it:
1. The reset circuit elements (and the reset button) are not present;
2. The chip reset input is not pulled-up. One can reset the chip when just measuring voltage level on this input;
3. The bus names marking on the board is incorrect.