ChrisImgtec

Forum Replies Created

Viewing 8 posts - 61 through 68 (of 68 total)
  • Author
    Posts
  • #64210

    ChrisImgtec
    Moderator

    I Need more information.

    What target are you using?

    What tools are you using?

    #64257

    ChrisImgtec
    Moderator

    I have been told “it should just work”. I also don’t see anything wrong with the steps you are taking.

    #64260

    ChrisImgtec
    Moderator

    Which version of Linux are you using? EIC works starting with 3.8.

    #64240

    ChrisImgtec
    Moderator

    Sorry I see a smilely face instead of an : and then )

    #64241

    ChrisImgtec
    Moderator

    Also to just read teh count register directly (If you are in Kernel mode)

    unsigned int count;

    asm volatile (“mfc0 %[count], $9”: [count] “=r”(count) 🙂 ;

    #64242

    ChrisImgtec
    Moderator

    While in Kernel mode execute the following to enable user mode reading of the count register:

    #include
    unsigned int v;
    v=0x00000004;
    mips32_sethwrena(v);

    In your user program to read the count register:

    unsigned int count;
    asm volatile (“rdhwr %[ count], 2”: [count] “=r”( count) 🙂 ;

    #64244

    ChrisImgtec
    Moderator

    I just though of something else, to get access to the count register from user mode using the rdhwr instruction the HWREna CP0 register needs to have bit 2 set. This can only be done form Kernel mode so you will need access to the OS to be able to set this bit.

    #64245

    ChrisImgtec
    Moderator

    I think I can help. Show me the code lines you are using to read the count register.

    The SIGILL is probably because you are in user mod and the mfco instruction can only be done in kernel mode.

Viewing 8 posts - 61 through 68 (of 68 total)