MIPS RISC Architecture

A complete reference manual to the MIPS RISC architecture, this book describes the user Instruction Set Architecture (ISA), by the R-Series processors, together with an extension to this ISA.

This book describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and associated registers and an overview of the underlying concepts that distinguish RISC from Complex Instruction Set Computer (CISC) architecture.